Changing the manufacturing process of a high-frequency low-noise amplifier (LNA) from a SiGe bipolar process) to a Silicon-On-Insulator (SOI) CMOS process has been studied. The cost of a SOI CMOS process is typically lower than the cost of a SiGe bipolar process, and also, the power loss of a high-frequency signal is reduced with a SOI CMOS process since the parasitic capacitance of a MOS transistor in a SOI CMOS process is smaller. Therefore, a high-frequency switch and a high-frequency LNA can be formed on the same SOI substrate and configured as one chip in a SOI CMOS process by using the SOI process without degradation in electrical characteristics.
To protect such an LNA from electrostatic discharge (ESD), an ESD protective element is sometimes provided at an input terminal of the LNA. However, since the ESD protective element itself has parasitic capacitance, the signal reflection characteristics or noise figure (NF) characteristics of a high-frequency signal at the input terminal are degraded.